Tunable planar capacitor

ABSTRACT

A tunable capacitor that introduces significantly less loss, if any, costs less and is smaller than previously available. A bias electrode is coupled to a FE material. The capacitor electrodes are electro-magnetically coupled to the FE material, such that the capacitor electrodes and the bias electrode are not touching. Only non-conductive material is in the gap defined by the capacitor electrodes. The bias electrode is used to apply a variable DC voltage to the FE material. A capacitor electrode serves as a DC ground for producing a variable DC field between the bias electrode and the capacitor electrodes.

RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. ProvisionalApplication 60/283,093, filed Apr. 11, 2001, which is herebyincorporated by reference. In addition, this application relates to U.S.application Ser. No. 09/904,631, “Tunable Ferro-Electric Filter,” filedon Jul. 13, 2001; Ser. No. 09/912,753, “Tunable Ferro-ElectricMultiplexer,” filed on Jul. 24, 2001; Ser. No. 09/927,732, “Low LossTunable Ferro-electric Device and Method of Characterization,” filed onAug. 8, 2001; and Ser. No. 09/927,136, “Tunable Matching Circuit,” filedon Aug. 10, 2001, which are hereby incorporated by reference.

BACKGROUND

[0002] Description of Related Art

[0003] Capacitors are commonly used in filters for wirelesscommunication. Capacitors with capacitances in the range of 0.5 to 10.0pF are typically employed in radio frequency signal paths to setresonant frequencies of filters to specific values. Additionally,capacitors are typically employed in matching circuits to matchimpedances between components in wireless communication devices. Acapacitor, in fact, is a fundamental component in electrical circuitdesign. As is well known in the art, capacitors can be found in manycircuits throughout electronic industries and wherever electroniccircuits are required.

[0004] Referring specifically to filters for use in wirelesscommunication devices, related application Ser. No. 09/904,631,discloses a tunable capacitor that has been developed for tuning theresonant frequency of a filter for use at different frequencies.Tunability can be achieved by applying a variable bias electric field toa ferro-electric (FE) material located in the field induced by thecapacitor. FE materials have a dielectric constant that varies with thebias electric field. As the dielectric constant varies, the capacitanceof the capacitor varies. This changes the resonant frequency of thefilter.

[0005] As disclosed in patent application Ser. No. 09/904,631, there arethree basic types of capacitors in common use: gap capacitors, overlaycapacitors and interdigital capacitors. Gap capacitors and interdigitalcapacitors are both planar structures. That is, both electrodes of thecapacitors are in the same plane. Overlay capacitors have electrodesthat are in different planes, that is, planes that overlay each other.Typically, overlay capacitors can develop higher capacitances, but theyare harder to fabricate than planar capacitors. Thus, this invention isfocused on improving the biasing scheme for planar capacitors. Thediscussion below is directed to gap capacitors, but it will beunderstood that the methods and devices described herein apply equallyto all planar capacitors.

[0006] It has proven difficult to apply the variable electric field tothe FE material in RF applications without introducing (1) increasedloss, (2) circuit complexity or (3) circuit size, or a combination ofthese three. The variable electric field is applied by applying avariable DC voltage to the FE material. Typically, in a planarcapacitor, FE material is placed between the electrodes of the capacitorand the substrate. Thus, the FE layer is formed on the substrate. Thecapacitor electrodes are formed on the FE layer, with a gap between theelectrodes, forming the capacitor.

[0007] One way of applying the DC voltage is to connect the DC voltagesource to an electrode of the capacitor through a resistor. Often, a DCblocking capacitor must be used in the RF signal path so as to providean RF ground for example, to the f-e capacitor without shorting out thedc bias applied. The DC blocking capacitor invariably introduces addedloss into the RF signal. This increased loss results in a lower signalto noise ratio for receive applications, which results in droppedcommunications, and increased power consumption in transmitapplications, among other things. Additionally, the resistor and the DCblocking capacitor add to the cost, size and complexity of the devicethat the capacitor is used in. Thus, this method of applying thevariable DC electric field to the FE material is not an optimalsolution.

[0008] While planar f-e capacitors are relatively simple to fabricate,they require a larger DC bias voltage to tune, as the gap dimensions arenecessarily large (typically greater than or equal to 2.0 microns) dueto conventional patterning constraints. Overlay f-e capacitors,alternatively, can be tuned with a minimum DC voltage, as the plateseparation can be made quite small (about 0.1 micron f-e film thicknessis possible and greater than about 0.25 microns is typical). Thus, therequired DC bias field strength can be a factor of 20 to 40 timessmaller for an overlay capacitor than for a gap capacitor. Furthermore,most all of the dc bias field is constrained within the f-e film in anoverlay capacitor. This is not true in a gap or interdigital capacitor,where a significant portion of the dc bias field is located outside ofthe f-e film.

[0009] One significant problem with overlay capacitors is that they aremore difficult to fabricate than gap capacitors, as they are multi-layerstructures. They typically need a common bottom electrode on which thedesired f-e thin film is deposited. Ideally the desired metals for thebottom electrodes are typically the low loss noble metals like gold,silver or preferably copper. The deposition requirements for most f-efilms however, would cause the unacceptable formation of metal oxides.To prevent unwanted oxidation, the deposition of a high refractorymetal, such as platinum as a cap, or covering, layer is needed, whichadds an extra mask or layer as well as increases cost. Additionally, thebottom layer metal thickness should be increased to greater than about2.0 skin depths, to minimize the metal loss in the bottom electrode.

[0010] Rather than relying on overlay capacitors, a compromise solutionis to introduce a pair of bias electrodes into the vicinity of the gapof a planar capacitor. One version would pattern one bias electrode inthe gap itself and place the other electrode between the substrate andthe f-e layer. The variable DC electric field is applied to the FEmaterial by putting bias electrodes in the form of doped silicon on bothsides of the FE material. Thus, a first doped silicon layer is formed onthe substrate. A FE layer is formed on the first doped silicon layer.The capacitor electrodes are formed on the FE layer. A second dopedsilicon layer is formed inside the gap region of the capacitor. The biasvoltage is applied to the second doped silicon layer and the first dopedsilicon layer is grounded, or vice versa. This approach is notpreferred, as it requires the presence of two bias electrodes, one aboveand one below the f-e layer as well as the presence of a bias electrodebetween the two rf electrodes in the gap capacitor.

[0011] Further, the gap typically must be widened to make room for thebias electrode between the two RF (capacitor) electrodes. Widening thegap reduces the capacitance of the structure. To bring the capacitanceback to a useful level, the capacitor must be made wider. This increasesthe size and cost of the capacitor. Additionally, it is difficult andcostly to manufacture a gap capacitor with a conducting layer of dopedsilicon in the gap, since one must provide added grounding as well asbias for a two layer bias scheme.

[0012] Accordingly, it would be beneficial to have a tunable FEcapacitor with a less complex, cheaper and smaller bias scheme forapplying the variable DC electric field to the FE material in a planartunable capacitor.

SUMMARY

[0013] Variable capacitors using a variable DC voltage to tune thecapacitance typically employ costly and overly large components to applythe variable DC voltage to the capacitor. Furthermore, at least onemethod of applying the variable DC voltage in the prior art introducesadded signal loss into the RF signal path due to the need for a DCblocking capacitor.

[0014] Thus, it is an object of the present invention to provide methodsand devices for applying a variable DC voltage to a tunable capacitorwhich introduce lower loss, lower cost and are smaller than thosemethods and devices previously available.

[0015] A bias electrode is positioned near a FE material. The capacitorelectrodes are also positioned near the FE material, such that thecapacitor electrodes and the bias electrode are not touching. There areonly non-conductive materials, including possibly air, in the gap formedbetween the capacitor electrodes. The bias electrode is used to apply avariable DC voltage to the FE material. In a wide range of usefulinstances, one or both capacitor electrodes serve as a DC ground forproducing a variable DC field between the bias electrode and thecapacitor electrodes, thus eliminating the need for the extra DCblocking capacitor. Alternatively, one of the capacitor electrodes canbe biased to, among other reasons, provide a modified capacitiveresponse in that electrode. In other words, a single bias underlayelectrode is added to a planar capacitor to achieve the biasing of theFE material. This allows for the elimination of biasing from eithercapacitor electrode. Alternatively, if bias is retained at eithercapacitor electrode, the underlay bias electrode allows for furtherbiasing schemes.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016]FIG. 1 is a side view of a tunable ferro-electric gap capacitor.

[0017]FIG. 2A is a top view of a tunable ferro-electric gap capacitor.

[0018]FIG. 2B is a circuit diagram equivalent of the tunableferro-electric gap capacitor shown in FIG. 2A.

[0019]FIG. 3 is a top view of a tunable ferro-electric gap capacitor,having a finger-like bias electrode.

[0020]FIG. 4 is a top view of a tunable ferro-electric gap capacitor,having a center portion of a bias electrode missing.

DETAILED DESCRIPTION

[0021] A tunable gap capacitor is formed on a substrate. A biaselectrode is positioned between the substrate and the capacitorelectrodes. Only non-conductive material is in the gap between thecapacitor electrodes. Between the bias electrode and the capacitorelectrodes is a FE material for tuning the capacitance of the capacitor.

[0022] In other words, only one bias electrode is introduced, as anunderlay, beneath the f-e film layer deposited on the base substrate. Inthis configuration, the rf electrodes provide the dc return paths forthe dc bias signal. In this realization there is no need for an externaldc blocking capacitor, as the dc bias introduced in this manner isinherently isolated from the rest of the circuit. A further advantage ofthis arrangement is that one need not increase the gap in the gapcapacitor to accommodate the presence of a two layer bias electrodestructure. Thus the most compact gap capacitor realization can beobtained in this manner.

[0023] The gap capacitor will now be described with reference to FIG. 1.FIG. 1 is a side view of a tunable FE capacitor 10. A substrate 12 isshown. The substrate 12 is typically a low loss ceramic material such asmagnesium oxide, sapphire, or some other such similar material on whichthe desired f-e film can be deposited, preferably without the need foran adhesion or buffer layer. The substrate can also be a more lossymaterial like silicon dioxide, alumina or a printed circuit boardmaterial such as the well known material, FR4 as long as one cantolerate the added loss arising from its use, along with the added costand complexity of using one or more buffer layers or an adhesion layerthat may be necessary with these substrates.

[0024] Formed on the substrate 12 is a bias electrode 14. The biaselectrode 14 is preferably doped silicon, as it can have a much lowerconductivity than any metal, and its conductivity can be controlled bydoping. Alternatively, the bias electrode 14 can be metal. Over the biaselectrode 14 is a FE layer 16. The FE layer 16 provides the tunabilityto the capacitor. Over the FE layer 16 are the capacitor electrodes 21and 24. The capacitor is part of a RF signal path. The capacitorelectrodes 21 and 24 define a space between the electrodes called a gap47. The gap 47 is defined by the electrodes. The gap 47 is shown as adotted line. The dotted line is separated somewhat from the solid linedefining the capacitor electrodes 21 and 24. This is for the sake ofdistinguishing between the lines defining the gap 47 and the electrodes21 and 24, not to indicate that there is any space between the gap 47and the electrodes 21 and 24. The gap 47 and the electrodes 21 and 24are coterminous.

[0025] The gap capacitor will now be described with reference to FIG.2A. FIG. 2A is a top view of the gap capacitor. A first capacitorelectrode 43 and a second capacitor electrode 45 form a capacitor gap47. A ferro-electric material 53 lies preferably underneath the firstand second capacitor electrodes 43 and 45. The ferro-electric material53 could alternatively lie over the top of the first and secondcapacitor electrodes 43 and 45 assuming the proper precautions are takento prevent the oxidation or melting of the metal traces 43 and 45 duringthe deposition of the f-e film on top of the electrodes. Due to theselimitations, the f-e film will almost always be under the rf metalcontacts, 43 and 45.

[0026] A bias electrode 55 lies preferably underneath the ferro-electricmaterial 53. The bias electrode 55 is preferably more narrow than theferro-electric material 53, so that the bias electrode 55 does not makeelectrical contact with the first or second capacitor electrodes 43 and45.

[0027] In some cases, it may be desirable to have a bias electrode ofsufficient size and electrical thickness relative to the gap region thatsome noticeable capacitance exists between the capacitor electrodes andthe bias electrode. An example of this is in the case where the biaselectrodes extends underneath the capacitor electrodes as shown inFIG. 1. In this case, the electrical equivalent circuit is shown in FIG.2B.

[0028] In FIG. 2B, a capacitor 44 is shown coupled between two terminals46 and 48. The capacitor 44 represents the capacitance developed betweenthe capacitor terminals 43 and 45 of FIG. 2A. The terminals 46 and 48represent the capacitor electrodes 43 and 45 shown in FIG. 2A. A thirdterminal 50 represents the bias electrode 55 shown in FIG. 2A. Two othercapacitors 52 and 54 are shown coupled between the terminals 46 and 48and the third terminal 50. The other capacitors 52 and 54 representcapacitances developed between the capacitor electrodes 43 and 45 shownin FIG. 2A and the bias electrode 55 shown in FIG. 2A.

[0029] Depending on geometry and the materials used, the capacitances ofcapacitors 52 and 54 may be negligible, or not, when zero volts isapplied to the bias electrode 55. Also, capacitors 52 and 54 may havesome non-negligible tuning characteristics, as the bias voltage appliedto bias electrode 55 is varied.

[0030] Additionally, a voltage may be applied to either terminal 46 or48, in addition to the voltage applied to terminal 50. This furthermodifies the tuning characteristics of the complete device shown in FIG.2B. In other words, there are two voltage differences that can bemanipulated. The two differences are (1) between terminal 46 andterminal 50 and (2) between terminal 48 and terminal 50. By varying thegeometries and electrode materials different tuning characteristics canbe achieved without changing FE materials and thicknesses. One drawbackof the embodiment employing a bias voltage at either terminal 46 or 48is, as already stated, that a DC blocking capacitor is then required. ADC blocking capacitor increases RF loss.

[0031] The bias electrodes need not be rectangular, as shown in FIG. 2.Preferably, the bias electrode has more than one finger as shown in FIG.3. Alternatively, the bias electrode may have a portion removed from itscenter, a shown in FIG. 4. These shapes further reduce the lossintroduced by the bias electrode by reducing any RF coupling to the biaselectrode.

[0032] A preferred bias electrode shape will now be described withreference to FIG. 3. There are two capacitor electrodes 63 and 65defining a gap 67. The bias electrode 80 is split into two fingers 72and 74. A finger is defined herein as a strip thinner than the wholeobject. Here it is used to mean a strip of bias electrode materialthinner than the whole bias electrode. This limits the RF current thatcan flow in the bias electrode 70, thereby reducing the loss in the biaselectrode 70. Alternatively, the bias electrode 70 may have more thantwo fingers (only two fingers 72 and 74 shown). Preferably, the fingerwidth 76 is about 1 to 2 microns.

[0033] A joining member 70 connects the fingers. In another embodiment,not shown, the joining member 70 is not inside the gap 67. The figners72 and 74 are longer and the joining member 70 is outside the gap 67 onthe side where the voltage is applied. It will be understood that manyvariations of this shape are possible.

[0034] The bias electrode 70 is adapted to be coupled to a voltagesource 78 which is coupled to a control signal generator 83. Note thatthe ferro-electric layer is not shown, to more clearly show the otheritems described.

[0035] Another bias electrode shape will now be described with referenceto FIG. 4. Again, there are two capacitor electrodes 86 and 89 defininga gap 92. The bias electrode 95 is similar in shape to the biaselectrode 70 described with reference to FIG. 3. The bias electrode 95,however, has its fingers connected at the ends. In other words, the biaselectrode 95 is like a rectangular bias electrode, but with its centermissing. Note that the shapes of bias electrodes described withreference to FIGS. 2A, 3 and 4 are simply by way of example. Othershapes, such as those having rounded corners, and asymmetrical shapes,would be within the spirit of the invention.

[0036] A variable DC voltage source 57 is coupled to the bias electrode53 for applying a variable DC voltage to the bias electrode. Note thatDC is intended to mean slowly varying with respect to a RF signal. Thevoltage on the capacitor electrodes will have some DC component. The DCcomponent may be zero. The difference between the variable DC voltageapplied to the bias electrode 53 and the DC component of the voltage inthe capacitor electrodes 43 and 45 creates a DC electric field in the FEmaterial 53. The variable DC voltage applied to the bias electrode 55can be varied to change the dielectric constant of the FE material 53.This changes the capacitance of the capacitor. This changes theoperating parameters of the device incorporating the capacitor, such as,for example, a filter or a matching circuit.

[0037] A control signal generator 59 is coupled to the voltage source 57for controlling the voltage source 57. The capacitor electrodes 43 and45, the bias electrode 55 and the ferro-electric material 53 are alllocated on a substrate 61. The control signal generator 59 and thevoltage source 57 may be located on the substrate 61 (as shown) or offthe substrate 61 (not as shown).

[0038] The bias electrode 55 is electrically thin, preferably less thanabout 0.01 microns so that it is less than about 0.1 skin depths. Theadded rf loss arising from the presence of the bias electrode is minimaland its effect is offset by the advantage gained in fabrication andimproved tuning.

[0039] The capacitor may be a tuning capacitor for use in a transceiverin a wireless communication device Preferably, the capacitor tunes amultiplexer or other filter-type device as described in U.S. patentapplication “Tunable Ferro-electric Multiplexer.” The method of tuningthe capacitor as described herein advantageously eliminates the need fora DC blocking capacitor and optionally eliminates the need for a DC biasresistor.

[0040] Alternatively, the capacitor may be used in conjunction with, oras part of, a tunable matching circuit as described in U.S. patentapplication, “Tunable Matching Circuit.” Again, a DC blocking capacitorand a DC resistor may be eliminated.

[0041] It will be apparent to one of ordinary skill in the art that thetunable capacitor can be used in many other electronic circuits. Suchuses are within the scope of the invention.

I claim:
 1. A planar tunable capacitor comprising: a first capacitorelectrode; a second capacitor electrode proximate the first capacitorelectrode, the first and second capacitor electrodes forming acapacitor; a gap defined by the capacitor electrodes, the gap consistingof non-conducting material; a ferro-electric layer proximate the gap; abias electrode proximate the ferro-electric layer; wherein the biaselectrode is not electrically connected to either of the capacitorelectrodes.
 2. The tunable capacitor of claim 1, further comprising acontrol signal generator coupled to a variable DC voltage source, thevariable DC voltage source also coupled to the bias electrode forapplying a variable DC voltage to the bias electrode.
 3. The tunablecapacitor of claim 1, wherein the second electrode is positioned within3.0 microns of the first electrode.
 4. The tunable capacitor of claim 1,wherein the capacitor comprises a gap capacitor.
 5. The tunablecapacitor of claim 1, wherein the capacitor comprises an interdigitalcapacitor.
 6. The tunable capacitor of claim 1, wherein the capacitor isformed on a substrate.
 7. The tunable capacitor of claim 6, wherein thesubstrate comprises a material chosen from the group consisting of:sapphire, magnesium oxide, silicon dioxide, alumina, and FR4.
 8. Thetunable capacitor of claim 1, wherein the bias electrode comprises amaterial chosen from the group consisting of: gold, silver, platinum,copper, and doped silicon.
 9. The tunable capacitor of claim 1, whereina thickness of the bias electrode is less than about 0.01 microns. 10.The tunable capacitor of claim 1, wherein an electrical thickness of thebias electrode is less than a fraction of about 0.1 times a skin depthof an RF signal.
 11. The tunable capacitor of claim 10, wherein the RFsignal comprises a 2.0 GHz signal.
 12. The tunable capacitor of claim 1,wherein the ferro-electric layer is formed on the bias electrode. 13.The tunable capacitor of claim 1, wherein a thickness of theferro-electric layer is equal to about one micron.
 14. The tunablecapacitor of claim 1, wherein a field attenuation caused by the biaselectrode is about 0.28 percent.
 15. The tunable capacitor of claim 14,wherein the field attenuation comprises field attenuation of a RF signalhaving a frequency equal to about 2.0 Ghz.
 16. The tunable capacitor ofclaim 1, wherein the ferro-electric layer comprises barium strontiumtitanate.
 17. The tunable capacitor of claim 1, wherein the biaselectrode comprises two fingers.
 18. The tunable capacitor of claim 1,wherein the bias electrode comprises two fingers that are not connectedinside the gap.
 19. The tunable capacitor of claim 1, wherein the biaselectrode comprises two fingers connected at both ends.
 20. A planartunable capacitor comprising: a ferro-electric material; a firstcapacitor electrode electro-magnetically coupled the ferro-electricmaterial; a second capacitor electrode electro-magnetically theferro-electric material the first and second capacitor electrodesforming a capacitor; a bias electrode coupled to the ferro-electricmaterial; wherein: the first capacitor electrode, the second capacitorelectrode and the bias electrode are adapted to change the dielectricconstant of the ferro-electric material responsive to a bias voltageapplied to the bias electrode and no other electrode substantiallycontributes to the changing of the dielectric constant; and the firstcapacitor electrode, the second capacitor electrode and theferro-electrode material are positioned such that the dielectricconstant of the ferro-electric material effects a capacitance of thecapacitor.
 21. The tunable capacitor of claim 20, further comprising acontrol signal generator coupled to a variable DC voltage source, thevariable DC voltage source also coupled to the bias electrode forapplying a variable DC voltage to the bias electrode.
 22. The tunablecapacitor of claim 20, wherein the second electrode is positioned within3.0 microns of the first electrode.
 23. The tunable capacitor of claim23, wherein the capacitor comprises a gap capacitor.
 24. The tunablecapacitor of claim 20, wherein the capacitor comprises an interdigitalcapacitor.
 25. The tunable capacitor of claim 20, wherein the capacitoris formed on a substrate.
 26. The tunable capacitor of claim 25, whereinthe substrate comprises a material chosen from the group consisting of:sapphire, magnesium oxide, silicon dioxide, alumina, and FR4.
 27. Thetunable capacitor of claim 20, wherein the bias electrode comprises amaterial chosen form the group consisting of: gold, silver, platinum,copper, and doped silicon.
 28. The tunable capacitor of claim 20,wherein a thickness of the bias electrode is less than about 0.01microns.
 29. The tunable capacitor of claim 20, wherein an electricalthickness of the bias electrode is less than a fraction of about 0.1times a skin depth of an RF signal.
 30. The tunable capacitor of claim29, wherein the RF signal comprises a 2.0 GHz signal.
 31. The tunablecapacitor of claim 20, wherein the ferro-electric material comprises aferro-electric layer formed on the bias electrode.
 32. The tunablecapacitor of claim 20, wherein the ferro-electric material comprises aferro-electric layer having a thickness of equal to about one micron.33. The tunable capacitor of claim 20, wherein a field attenuationcaused by the bias electrode is about 0.28 percent.
 34. The tunablecapacitor of claim 33, wherein the field attenuation comprises fieldattenuation of a RF signal having a frequency equal to about 2.0 Ghz.35. The tunable capacitor of claim 20, wherein the ferro-electricmaterial comprises barium strontium titanate.
 36. The tunable capacitorof claim 20, wherein the bias electrode comprises two fingers.
 37. Thetunable capacitor of claim 20, wherein the bias electrode comprises twofingers that are not connected inside the gap.
 38. The tunable capacitorof claim 20, wherein the bias electrode comprises two fingers connectedat both ends.
 39. A wireless communication device comprising: a planartunable capacitor comprising: a first capacitor electrode; a secondcapacitor electrode proximate the first capacitor electrode, the firstand second capacitor electrodes forming a capacitor; a gap defined bythe capacitor electrodes, the gap consisting of non-conducting material;a ferro-electric layer proximate the gap; a bias electrode proximate theferro-electric layer; wherein the bias electrode is not electricallyconnected to either of the capacitor electrodes; and a transceivercomprising a band pass filter, the filter coupled to the capacitor. 40.The wireless communication device of claim 39, further comprising acontrol signal generator coupled to a variable DC voltage source, thevariable DC voltage source also coupled to the bias electrode forapplying a variable DC voltage to the bias electrode.
 41. The wirelesscommunication device of claim 39, wherein the second electrode ispositioned within 3.0 microns of the first electrode.
 42. The wirelesscommunication device of claim 39, wherein the capacitor comprises a gapcapacitor.
 43. The wireless communication device of claim 39, whereinthe capacitor comprises an interdigital capacitor.
 44. The wirelesscommunication device of claim 39, wherein the capacitor is formed on asubstrate.
 45. The wireless communication device of claim 44, whereinthe substrate comprises a material chosen from the group consisting of:sapphire, magnesium oxide, silicon dioxide, alumina, and FR4.
 46. Thewireless communication device of claim 39, wherein the bias electrodecomprises a material chosen form the group consisting of: gold, silver,platinum, copper, and doped silicon.
 47. The wireless communicationdevice of claim 39, wherein a thickness of the bias electrode is lessthan about 0.01 microns.
 48. The wireless communication device of claim39, wherein an electrical thickness of the bias electrode is less than afraction of about 0.1 times a skin depth of an RF signal.
 49. Thewireless communication device of claim 48, wherein the RF signalcomprises a 2.0 GHz signal.
 50. The wireless communication device ofclaim 39, wherein the ferro-electric layer is formed on the biaselectrode.
 51. The wireless communication device of claim 39, wherein athickness of the ferro-electric layer is equal to about one micron. 52.The wireless communication device of claim 39, wherein a fieldattenuation caused by the bias electrode is about 0.28 percent.
 53. Thewireless communication device of claim 52, wherein the field attenuationcomprises field attenuation of a RF signal having a frequency equal toabout 2.0 Ghz.
 54. The wireless communication device of claim 39,wherein the ferro-electric layer comprises barium strontium titanate.55. The tunable capacitor of claim 39, wherein the bias electrodecomprises two fingers.
 56. The tunable capacitor of claim 39, whereinthe bias electrode comprises two fingers that are not connected insidethe gap.
 57. The tunable capacitor of claim 39, wherein the biaselectrode comprises two fingers connected at both ends.